When SK is large stage and CS is modified from large degree to low stage, AK6420A/40A/80A can receive theinstructions. CS ought to be retained reduced level although obtaining op-code, handle and data and when outputting info.
If CS is changed to high stage in the course of the above period, AK6420A/40A/80A stops the instruction execution.When SK is minimal and CS is modified from higher amount to lower amount, AK6420A/40A/80A might be in standing outputmode.
The CS need not be very low stage throughout the automated create time-out time period (Hectic status).SK (Serial Clock)The SK clock pin would be the synchronous clock enter for input/output knowledge.
At compose procedure, AK6420A/40A/80Atakes in the produce information from data enter pin (DI) synchronously with soaring fringe of input pulse of serial clock pin(SK).
And at study operation, AK6420A/40A/80A requires out the read through details to knowledge output pin (DO)synchronously with slipping fringe of SK.
The SK clock is just not necessary all through the automated write time-out period of time(Chaotic standing), the standing output period of time and in the event the product is just not selected (CS = significant amount).DI (Facts Enter)The op-code, handle and compose facts is input towards the DI pin.
DO (Details Output)The DO pin outputs the go through facts and status sign and will be higher impedance apart from this timing.RDY/BUSY (Ready/Busy position)This pin outputs the interior programming standing.
When the AK6420A/40A/80A is in the automated publish time-out period of time, this pin outputs the reduced amount (Occupied position), and outputs the high amount except for this timing.